assembly - Alignment in VLD1 -



assembly - Alignment in VLD1 -

i have question arm neon vld1 instruction's alignment. how alignment in next code work?

data .req r0 vld1.16 {d16, d17, d18, d19}, [data, :128]!

does starting address of read instruction shifts info + positive integer, such smallest multiple of 16(16 bytes = 128 bits) no less data, or info changes smallest multiple of 16 no less data?

it hint cpu. thing read usefulness of such hint blog post on arm's site claiming makes loading faster, doesn't how or why however. because cpu can issue wider loads.

you can specify alignment pointer passed in rn, using optional : parameter, speeds memory accesses.

if provide hint must create sure data aligned 16 bytes otherwise you'll hardware exception.

this hardware behavior described in vld1 description in arm arm as

if conditionpassed() encodingspecificoperations(); checkadvsimdenabled(); nullcheckifthumbee(n); address = r[n]; if (address mod alignment) != 0 generatealignmentexception(); if wback r[n] = r[n] + (if register_index r[m] else ebytes); elem[d[d],index,esize] = memu[address,ebytes];

mainly line

if (address mod alignment) != 0 generatealignmentexception();

i can't understand why cpu can check alignment , apply best condition. may cost much cycles.

assembly arm neon

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